Graduate School of Informatics and Engineering
The University of Electro-Communications
(Japanese version is here)
Shinobu Miwa (Associate Professor, CV)
Department of Information System Fundamentals, The University of Electro-Communications
1-5-1, Chofugaoka, Chofu, Tokyo 182-8585, JAPAN
E-Mail: miwa 'at' hpc.is.uec.ac.jp
Computer architecture, high performance computing, system software, embedded systems
- S. Miwa, I. Laguna, and M. Schulz,
PredCom: A Predictive Apporoach to Collecting Communication Traces,
IEEE Transactions on Parallel and Distributed Systems, Vol. 32, Issue 1, pp.45-58 (2021)
- S. Miwa, M. Ishihara, H. Yamaki, H. Honda, and M. Schulz, Footprint-Based DIMM Hotplug,
IEEE Transactions on Computers, Vol. 69, Issue 2, pp.172-184 (2020) (Featured Paper in the February 2020 issue).
- H. Yamaki, H. Nishi, S. Miwa, and H. Honda, Data Prediction for Response Flows in Packet Processing Cache, In Proceedings of the 2018 55th ACM/EDAC/IEEE Design Automation Conference (DAC), No. 110, 6 pages, Jul. 2018 (acceptance rate: 158/747=21%).
- S. Miwa, and H. Nakamura, Profile-Based Power Shifting in Interconnection Networks with On/Off Links, In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC15), pp.37:1–37:11, Nov. 2015 (acceptance rate: 79/358=22%).
- S. Miwa, and C. R. Lefurgy, Evaluation of Core Hopping on POWER7, ACM SIGMETRICS Performance Evaluation Review, Special Issue on Greenmetrics 2014, pp.11–16 (2014) (also appeared in the 2014 GreenMetrics Workshop, 6 pages, Jun 2014).
Selected Invited Talks
- Variation of GPU Power in Supercomputing Systems, George Washington University, Washington, DC, USA, Sep. 2019.
- Energy-Efficient Computers with Increased Hardware Resources, the 78th National Convention of Information Processing Society of Japan, Mar. 2016 (in Japanese).
- Network and Memory Power Management in High Performance Computing Systems, IBM Austin Research Labs, Austin, TX, USA, Nov. 2015.
- Power Shifting between Networks and CPUs in HPC System, JST/CREST International Symposium on Post Petascale System Software, Dec. 2014.
- Low-Power Processors in Dark Silicon Era, 2014 Embedded System Symposium, Oct. 2014 (in Japanese).
- Power Management for Exascale Computing, IBM Austin Research Labs, Austin, TX, USA, Feb. 2014.
- Development of Innovative Frameworks for Application Analysis in Post-Peta Scale Systems, 20H04193, Grant-in-Aid for Scientific Research, Japan Society for the Promotion of Science, 14,320,000 JPY, principal investigator, Apr. 2020–Present (acceptance rate: 3,393/12,198=27.8%).
- Resource Manager in Next-Generation Massively Parallel Processing Environments, Research Grant, KDDI Foundation, 3,000,000 JPY, principal investigator, Apr. 2020–Present.
- A Study of Performance Evaluation and Memory Models of AI Applications on High Performance Computing Systems, Toshiba Memory Corp., 2,200,000 JPY, principal investigator, Jul 2019–Mar. 2021.
- A Study of Profile Prediction for MPI Parallel Applications Executed on Massively Parallel Processing Environments, K30-XXIII-524, Research Grant, Kayamori Foundation of Informational Science Advancement, 800,000 JPY, principal investigator, Nov. 2018–Oct. 2020 (acceptance rate: 21/162=13%).
- A Study of Ultrascaled Nanocarbon Processor Architecture, 18K19778, Grant-in-Aid for Scientific Research, Japan Society for the Promotion of Science, 6,240,000 JPY, principal investigator, Apr. 2018–Present (acceptance rate: 1,466/12,141=12%).
- Power Management Framework for Post-Peta Scale Systems, Core Research for Evolutionary Science and Technology, Japan Science and Technology Agency, 223,254,000 JPY, co-investigator (PI: Professor Masaaki Kondo), Oct. 2012–Mar. 2018.
- Development of Fundamental Technology for Normally-off Computing, Toshiba Corp., 1,000,080 JPY, May 2015–Feb. 2016 (principal investigator).
- A Study of Heat-Spread-Aware Processors, R24700044, Grant-in-Aid for Scientific Research, Japan Society for the Promotion of Science, 4,420,000 JPY, principal investigator, Apr. 2012–Mar. 2014 (acceptance rate: 6,255/20,867=30%).
Awards (for me)
- Best Paper Award for Computers Track in the 2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, Aug. 2019
- Best Paper Award in the 2010 Embedded System Symposium, Oct. 2010
- Second Place in the free programming track of the 2010 GPU Challenge, May 2010
- Best Poster Award in the 2008 Symposium on Advanced Computing Systems and Infrastructures, Jun. 2008
- Student Encouragement Award received from Kansai-Section Convention of Information Processing Society of Japan, Oct. 2003
Awards (for graduates and undergraduates)
- K. Tanaka, IPSJ Yamashita SIG Research Award, 2019
- K. Tanaka, IEEE CEDA All Japan Joint Chapter Design Gaia Best Poster Award, Dec. 2018
- K. Tanaka, Third Place in the undergraduate category at MICRO51 ACM Student Research Competition, Oct. 2018
- Y. He, his Ph.D. thesis is selected as one of the best papers recommended by SIG (Special Interest Group) of System Architecture in IPSJ (Information Processing Society of Japan), Jul. 2014
- A. Ohta, his Ph.D. thesis is selected as one of the best papers recommended by SIG of Embedded Systems in IPSJ, Jul. 2013
- A. Ohta, Encouragement Award in the Field of Computer Science of IPSJ, Oct. 2010
Selected Professional Activities
- IEEE International Symposium on Embedded Multicore/Many-core System-on-Chip (MCSoC), 2018–2021
Technical Program Committees
- PhD Forum in International Supercomputing Conference (ISC), (2020–2021)
- IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), 2018–2019
- International Conference on Parallel Processing (ICPP), 2018, 2021
- IEEE International Conference on Computer Design (ICCD), 2014–2015
- IEICE (Institute of Electronics, Information and Communication Engineers) Transactions on Information and Systems, Jun. 2015–May 2019
- IPSJ Magazine, Apr. 2010–Mar. 2016
- IPSJ Transactions on Advanced Computing Systems, Apr. 2011–Mar. 2015, Apr. 2020–Present
- IPSJ Journal of Information Processing, Jun. 2009–May 2013
- ACM/EDAC/IEEE Design Automation Conference (DAC), 2014
- ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2012
- International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 2011–2012
- ACM International Conference on Supercomputing (ICS), 2008
- Evaluation committee member of Energy-Saving Project, New Energy and Industrial Technology Development Organization, Apr. 2016–Present
- Mathematical Information Science Laboratory II/Computer Science Laboratory II (CPU cache simulation), Faculty of Informatics and Engineering at the University of Electro-Communications, 2018–Present
- Logic Circuit Design, Faculty of Informatics and Engineering at the University of Electro-Communications, 2018–Present
- Parallel Processing II/High Performance Computing II, Graduate School of Informatics and Engineering, and Information Systems at the University of Electro-Communications, 2015–Present
- Mathematical Information Science Laboratory I/Computer Science Laboratory I (Logic circuit and Verilog-HDL), Faculty of Informatics and Engineering at the University of Electro-Communications, 2016
- Elements of Information Systems Fundamentals I (Computer architecture), Graduate School of Information Systems at the University of Electro-Communications, 2015
- Mathematical Engineering and Information Physics Laboratory I (Logic circuit and Verilog-HDL by using FPGA), Department of Mathematical Engineering and Information Physics at the University of Tokyo, 2013–2014
- Information System Design Laboratory (C programming), Department of Mathematical Engineering and Information Physics at the University of Tokyo, 2011–2014
- Associate Professor in the University of Electro-Communications, Mar. 2015–Present
- Visiting Scientists and Professionals in Lawrence Livermore National Laboratory, Apr. 2017–Mar. 2018
- Visiting Researcher in the University of Tokyo, Feb. 2017–Sep. 2017
- Assistant Professor in the University of Tokyo, Apr. 2011–Feb. 2015
- Project Assistant Professor in Tokyo University of Agriculture and Technology, Jan 2008–Mar. 2011
- Research Associate in Kyoto University, Apr. 2005–Dec. 2007
- Ph.D. of Informatics, Kyoto University, Nov. 2007
- Master of Informatics, Kyoto University, Mar. 2002
- Bachelor of Engineering, Kyoto University, Mar. 2000